[https://nvbugs/6578853][test] Unwaive layer-wise benchmarks performance alignment test

[kaiyux]

Dev Engineer Review

• Removed the waive entry for unittest/tools/test_layer_wise_benchmarks.py::test_performance_alignment[1].
• The change uses the existing waives.txt format.
• The scope is limited to the world-size-1 test.
• No code, API, performance, or error-handling changes are included.
• No duplicate or invalid test entry is introduced.

QA Engineer Review

• Modified tests/integration/test_lists/waives.txt.
• Removed the waive and associated skip reference for unittest/tools/test_layer_wise_benchmarks.py::test_performance_alignment[1].
• No test-db/ or qa/ files were modified.
• The test remains covered by the existing test configuration and retains its nsys CUDA tracing and SM100+ conditions.
• Verdict: needs follow-up because CBTS coverage data is unavailable.

Description

Removes the waive for unittest/tools/test_layer_wise_benchmarks.py::test_performance_alignment[1].

The case was waived under https://nvbugs/6578853 by the automated waive PR #17443 (pre-merge 52592) on 08/09. This PR drops that line so the case runs again in pre-merge and the current state of the bug is validated against ToT rather than staying permanently skipped.

The test is the world-size-1 leaf of the layer-wise benchmarks performance-alignment flow: it runs examples/layer_wise_benchmarks/sample_performance_alignment.sh against the pinned DeepSeek-V3-Lite/nvfp4_moe_only checkpoint (collect/mark nsys passes, run.sh replay, then parse_e2e.py / parse.py / correlation.py), followed by a standalone parse.py invocation.

Test Coverage

unittest/tools/test_layer_wise_benchmarks.py::test_performance_alignment[1] — already listed in tests/integration/test_lists/test-db/l0_b200.yml, so removing the waive re-enables it in the DGX_B200-PyTorch-* pre-merge stages. No other change is needed to schedule it.

Note that the module-scoped require_nsys_cuda_tracing fixture still skips the whole file on nodes where nsys cannot record CUDA activity (CUDA forward-compatibility mode, https://nvbugs/6162541), and @skip_pre_blackwell still gates the case to SM100+.

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📒 Files selected for processing (1)

• tests/integration/test_lists/waives.txt

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• tests/integration/test_lists/waives.txt

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Walkthrough

The integration test waiver list no longer contains the waived test_performance_alignment[1] entry tracked by NVBUG 6578853.

Changes

Test waiver cleanup

Layer / File(s)	Summary
Remove performance alignment waiver tests/integration/test_lists/waives.txt	Removes the skip waiver for test_performance_alignment[1].

Estimated code review effort: 1 (Trivial) | ~2 minutes

Merge Risk: ⚪ Minimal · up to 5697f

This change only re-enables an existing performance-alignment test, with no actionable merge-blocking risk remaining after normal checks and review.

Possibly related PRs

• NVIDIA/TensorRT-LLM#17855: Removes another stale waiver from the same file.
• NVIDIA/TensorRT-LLM#17962: Removes an individual waiver from the same file.
• NVIDIA/TensorRT-LLM#17946: Removes another individual test waiver from the same file.

Suggested reviewers: xinhe-nv

🚥 Pre-merge checks | ✅ 5

✅ Passed checks (5 passed)

Check name	Status	Explanation
Title check	✅ Passed	The title clearly identifies the NVBugs issue, test-related change, and removal of the layer-wise benchmarks waive.
Description check	✅ Passed	The description explains the reason, scope, affected test, coverage, existing gates, and checklist status.
Docstring Coverage	✅ Passed	No functions found in the changed files to evaluate docstring coverage. Skipping docstring coverage check.
Linked Issues check	✅ Passed	Check skipped because no linked issues were found for this pull request.
Out of Scope Changes check	✅ Passed	Check skipped because no linked issues were found for this pull request.

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