[https://nvbugs/6602094][test] Unwaive RocketKV model tests

[lfr-0531]

Dev Engineer Review

• Removed the two RocketKV Llama 3.1 skip entries from tests/integration/test_lists/waives.txt.
• Restores TRTLLM and VANILLA attention backend tests to regular CI coverage.
• The change has no product-code or API impact.
• Repeated GB300 runs and local B200 validation support removal of the one-off timeout waivers.

QA Engineer Review

• No test-db/ or qa/ files were modified.
• Removed the TRTLLM and VANILLA RocketKV Llama 3.1 entries from waives.txt.
• The RocketKV test is present in:
  • tests/integration/test_lists/test-db/l0_b200.yml
  • tests/integration/test_lists/qa/llm_function_core.txt
• Verdict: sufficient.

Description

NVBug 6602094 tracked a one-off timeout in the RocketKV Llama 3.1 model tests. Subsequent repeated runs on 4x GB300 passed for both the TRTLLM and VANILLA attention backends, and the VANILLA case also passed 10 consecutive local B200 runs.

Remove the two SKIP entries so both RocketKV configurations return to regular CI coverage. This changes only the waiver list and has no product-code or API impact.

Test Coverage

• python3 scripts/check_test_list.py --validate --check-duplicate-waives: OK: 2065 unique test entries validated.
• pre-commit run --files tests/integration/test_lists/waives.txt: passed in a Python 3.12 development container.
• test_model[VANILLA-llama-3.1-model/Llama-3.1-8B-Instruct-pytorch]: 10/10 passed locally on B200.
• Both VANILLA and TRTLLM configurations passed repeated Repair Bot runs on 4x GB300.

PR Checklist

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• PR description clearly explains what and why. If using CodeRabbit's summary, please make sure it makes sense.

• PR Follows TRT-LLM CODING GUIDELINES to the best of your knowledge.

• Test cases are provided for new code paths (see test instructions)

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• Any new dependencies have been scanned for license and vulnerabilities

• CODEOWNERS updated if ownership changes

• Documentation updated as needed

• Update tava architecture diagram if there is a significant change.

• The reviewers assigned automatically/manually are appropriate for the PR.

• Please check this after reviewing the above items as appropriate for this PR.

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[coderabbitai]

No actionable comments were generated in the recent review. 🎉

ℹ️ Recent review info

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Plan: Enterprise

Run ID: 1f3aa9b4-7737-498a-b373-de4d757fd419

📥 Commits

Reviewing files that changed from the base of the PR and between 96a143e and 82396cb.

📒 Files selected for processing (1)

• tests/integration/test_lists/waives.txt

💤 Files with no reviewable changes (1)

• tests/integration/test_lists/waives.txt

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---

Walkthrough

The integration test waiver list no longer skips the TRTLLM and VANILLA RocketKV Llama 3.1 model tests.

Changes

RocketKV waiver cleanup

Layer / File(s)	Summary
Remove RocketKV test waivers tests/integration/test_lists/waives.txt	Removed the skip waivers for the TRTLLM and VANILLA RocketKV Llama 3.1 model tests.

Estimated code review effort: 1 (Trivial) | ~2 minutes

Merge Risk: ⚪ Minimal · up to 82396

This change restores regular CI coverage for two RocketKV model tests without changing product code or APIs; no actionable merge-blocking risk remains after normal checks and review.

Possibly related PRs

• NVIDIA/TensorRT-LLM#17819: Removes two different model-specific skip entries from the same waiver list.
• NVIDIA/TensorRT-LLM#17962: Removes obsolete waiver entries from the same waiver list.
• NVIDIA/TensorRT-LLM#17995: Modifies waiver entries in the same waiver list.

Suggested reviewers: mzweilz

🚥 Pre-merge checks | ✅ 5

✅ Passed checks (5 passed)

Check name	Status	Explanation
Title check	✅ Passed	The title identifies the NVBugs ID, test change, and removal of RocketKV model test waivers.
Description check	✅ Passed	The description explains the issue, solution, validation results, impact, and includes the required checklist sections.
Docstring Coverage	✅ Passed	No functions found in the changed files to evaluate docstring coverage. Skipping docstring coverage check.
Linked Issues check	✅ Passed	Check skipped because no linked issues were found for this pull request.
Out of Scope Changes check	✅ Passed	Check skipped because no linked issues were found for this pull request.

✨ Finishing Touches

🧪 Generate unit tests (beta)

• Create PR with unit tests

---

_{Comment @coderabbitai help to get the list of available commands.}

[lfr-0531]

/bot run --disable-fail-fast

[tensorrt-cicd]

PR_Github #67781 [ run ] triggered by Bot. Commit: 82396cb Link to invocation

[tensorrt-cicd]

PR_Github #67781 [ run ] completed with state SUCCESS. Commit: 82396cb
/LLM/main/L0_MergeRequest_PR pipeline #55258 completed with status: 'SUCCESS'

CI Report

Link to invocation

[lfr-0531]

/bot run --stage-list "GB300-4_GPUs-PyTorch-Post-Merge-1"

[tensorrt-cicd]

PR_Github #67812 [ run ] triggered by Bot. Commit: 82396cb Link to invocation

[tensorrt-cicd]

PR_Github #67812 [ run ] completed with state FAILURE. Commit: 82396cb
/LLM/main/L0_MergeRequest_PR pipeline #55280 (Partly Tested) completed with status: 'UNSTABLE'

CI Report

⚠️ Multi-GPU Label Required:
Multi-GPU tests require the ci: full pre-merge approved label on this PR. Ask a member of NVIDIA/trt-llm-ci-approvers to add the label, then re-trigger CI with the same bot command (no rebase needed).

⚠️ Action Required:

• Please check the failed tests and fix your PR
• If you cannot view the failures, ask the CI triggerer to share details
• Once fixed, request an NVIDIA team member to trigger CI again

Link to invocation

[lfr-0531]

I reran these tests on GB300 multiple times, and I cannot reproduce the failure.

[lfr-0531]

/bot run --disable-fail-fast

[tensorrt-cicd]

PR_Github #68047 [ run ] triggered by Bot. Commit: 82396cb Link to invocation

[tensorrt-cicd]

PR_Github #68047 [ run ] completed with state SUCCESS. Commit: 82396cb
/LLM/main/L0_MergeRequest_PR pipeline #55501 completed with status: 'SUCCESS'

CI Report

Link to invocation

[ZhanruiSunCh]

LGTM for infra part. Verified both unwaived test_model parametrizations (TRTLLM and VANILLA) passed in build #55258.