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fix(linker): correct cross-toolchain memory map inconsistencies #21

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3e5b5c8
fix(linker): correct cross-toolchain memory map inconsistencies in ST…
94xhn Jul 11, 2026
d7bdc94
Align reviewed linker maps with the confirmed AXISRAM boundaries
94xhn Jul 28, 2026
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27 changes: 14 additions & 13 deletions ...RTEX/CORTEX_InterruptSwitch_TrustZone/STM32CubeIDE/AppliNonSecure/STM32N657X0HXQ_FLASH.ld
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Original file line number Diff line number Diff line change
Expand Up @@ -44,21 +44,22 @@ _Min_Stack_Size = 0x1000; /* required amount of stack */
/* Memories definition */
MEMORY
{
RAM (xrw) : ORIGIN = 0x241a0000, LENGTH = 256K
ROM (xrw) : ORIGIN = 0x241A0000, LENGTH = 128K
RAM (xrw) : ORIGIN = 0x241C0000, LENGTH = 256K
}

/* Sections */
SECTIONS
{
/* The startup code into "RAM" Ram type memory */
/* The startup code into "ROM" Rom type memory */
.isr_vector :
{
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
. = ALIGN(4);
} >RAM
} >ROM

/* The program code and other data into "RAM" Ram type memory */
/* The program code and other data into "ROM" Rom type memory */
.text :
{
. = ALIGN(4);
Expand All @@ -75,23 +76,23 @@ SECTIONS

. = ALIGN(4);
_etext = .; /* define a global symbols at end of code */
} >RAM
} >ROM

/* Constant data into "RAM" Ram type memory */
/* Constant data into "ROM" Rom type memory */
.rodata :
{
. = ALIGN(4);
*(.rodata) /* .rodata sections (constants, strings, etc.) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
. = ALIGN(4);
} >RAM
} >ROM

.ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >RAM
} >ROM

.ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
Expand All @@ -100,7 +101,7 @@ SECTIONS
*(.ARM.exidx*)
__exidx_end = .;
. = ALIGN(4);
} >RAM
} >ROM

.preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
Expand All @@ -109,7 +110,7 @@ SECTIONS
KEEP (*(.preinit_array*))
PROVIDE_HIDDEN (__preinit_array_end = .);
. = ALIGN(4);
} >RAM
} >ROM

.init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
Expand All @@ -119,7 +120,7 @@ SECTIONS
KEEP (*(.init_array*))
PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(4);
} >RAM
} >ROM

.fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
{
Expand All @@ -129,7 +130,7 @@ SECTIONS
KEEP (*(.fini_array*))
PROVIDE_HIDDEN (__fini_array_end = .);
. = ALIGN(4);
} >RAM
} >ROM

/* Used by the startup to initialize data */
_sidata = LOADADDR(.data);
Expand All @@ -145,7 +146,7 @@ SECTIONS
. = ALIGN(4);
_edata = .; /* define a global symbol at data end */

} >RAM
} >RAM AT> ROM

.noncacheable :
{
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2 changes: 1 addition & 1 deletion ...6570-DK/Applications/VENC/VENC_RTSP_Server/STM32CubeIDE/FSBL/STM32N657XX_AXISRAM2_fsbl.ld
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Original file line number Diff line number Diff line change
Expand Up @@ -49,7 +49,7 @@ _Min_Stack_Size = 0x800; /* required amount of stack */
MEMORY
{
ROM (xr) : ORIGIN = 0x34180400, LENGTH = 255K
RAM (rw) : ORIGIN = 0x341C0000, LENGTH = 255K
RAM (rw) : ORIGIN = 0x341C0000, LENGTH = 256K
DTCM (rw) : ORIGIN = 0x30000000, LENGTH = 128K
}

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2 changes: 1 addition & 1 deletion Projects/STM32N6570-DK/Applications/VENC/VENC_SDCard/STM32CubeIDE/Appli/STM32N657XX_LRUN.ld
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Original file line number Diff line number Diff line change
Expand Up @@ -48,7 +48,7 @@ _eDTCM = ORIGIN(DTCM) + LENGTH(DTCM);
/* Memories definition */
MEMORY
{
ROM (xr) : ORIGIN = 0x34000400, LENGTH = 256K
ROM (xr) : ORIGIN = 0x34000400, LENGTH = 255K
RAM (rw) : ORIGIN = 0x341B7000, LENGTH = 2340K
DTCM (rw) : ORIGIN = 0x30000000, LENGTH = 128K
}
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2 changes: 1 addition & 1 deletion ...TM32N6570-DK/Applications/VENC/VENC_SDCard/STM32CubeIDE/FSBL/STM32N657XX_AXISRAM2_fsbl.ld
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Original file line number Diff line number Diff line change
Expand Up @@ -49,7 +49,7 @@ _Min_Stack_Size = 0x800; /* required amount of stack */
MEMORY
{
ROM (xr) : ORIGIN = 0x34180400, LENGTH = 255K
RAM (rw) : ORIGIN = 0x341C0000, LENGTH = 255K
RAM (rw) : ORIGIN = 0x341C0000, LENGTH = 256K
DTCM (rw) : ORIGIN = 0x30000000, LENGTH = 128K
}

Expand Down
2 changes: 1 addition & 1 deletion ...0-DK/Applications/VENC/VENC_SDCard_ThreadX/STM32CubeIDE/FSBL/STM32N657XX_AXISRAM2_fsbl.ld
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Original file line number Diff line number Diff line change
Expand Up @@ -49,7 +49,7 @@ _Min_Stack_Size = 0x800; /* required amount of stack */
MEMORY
{
ROM (xr) : ORIGIN = 0x34180400, LENGTH = 255K
RAM (rw) : ORIGIN = 0x341C0000, LENGTH = 255K
RAM (rw) : ORIGIN = 0x341C0000, LENGTH = 256K
DTCM (rw) : ORIGIN = 0x30000000, LENGTH = 128K
}

Expand Down
2 changes: 1 addition & 1 deletion ...s/STM32N6570-DK/Applications/VENC/VENC_USB/STM32CubeIDE/FSBL/STM32N657XX_AXISRAM2_fsbl.ld
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Original file line number Diff line number Diff line change
Expand Up @@ -49,7 +49,7 @@ _Min_Stack_Size = 0x800; /* required amount of stack */
MEMORY
{
ROM (xr) : ORIGIN = 0x34180400, LENGTH = 255K
RAM (rw) : ORIGIN = 0x341C0000, LENGTH = 255K
RAM (rw) : ORIGIN = 0x341C0000, LENGTH = 256K
DTCM (rw) : ORIGIN = 0x30000000, LENGTH = 128K
}

Expand Down
2 changes: 1 addition & 1 deletion Projects/STM32N6570-DK/Examples/PWR/PWR_STANDBY/EWARM/Appli/stm32n657xx_LRUN.icf
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Expand Up @@ -7,7 +7,7 @@ define symbol __ICFEDIT_intvec_start__ = 0x34000400;
define symbol __ICFEDIT_region_ROM_start__ = 0x34000400;
define symbol __ICFEDIT_region_ROM_end__ = 0x3407FFFF;
define symbol __ICFEDIT_region_RAM_start__ = 0x34080000;
define symbol __ICFEDIT_region_RAM_end__ = 0x341FFFFF;
define symbol __ICFEDIT_region_RAM_end__ = 0x340FFFFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x800;
define symbol __ICFEDIT_size_heap__ = 0x200;
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2 changes: 1 addition & 1 deletion Projects/STM32N6570-DK/Examples/PWR/PWR_STANDBY/STM32CubeIDE/Appli/STM32N657X0HXQ_LRUN.ld
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Original file line number Diff line number Diff line change
Expand Up @@ -45,7 +45,7 @@ _Min_Stack_Size = 0x800; /* required amount of stack */
MEMORY
{
ROM (xrw) : ORIGIN = 0x34000400, LENGTH = 511K
RAM (xrw) : ORIGIN = 0x34020000, LENGTH = 1536K
RAM (xrw) : ORIGIN = 0x34080000, LENGTH = 512K
}

/* Sections */
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2 changes: 1 addition & 1 deletion Projects/STM32N6570-DK/Examples/PWR/PWR_STANDBY_RTC/EWARM/Appli/stm32n657xx_LRUN.icf
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Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@ define symbol __ICFEDIT_intvec_start__ = 0x34000400;
define symbol __ICFEDIT_region_ROM_start__ = 0x34000400;
define symbol __ICFEDIT_region_ROM_end__ = 0x3407FFFF;
define symbol __ICFEDIT_region_RAM_start__ = 0x34080000;
define symbol __ICFEDIT_region_RAM_end__ = 0x341FFFFF;
define symbol __ICFEDIT_region_RAM_end__ = 0x340FFFFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x800;
define symbol __ICFEDIT_size_heap__ = 0x200;
Expand Down
2 changes: 1 addition & 1 deletion ...ects/STM32N6570-DK/Examples/PWR/PWR_STANDBY_RTC/STM32CubeIDE/Appli/STM32N657X0HXQ_LRUN.ld
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Original file line number Diff line number Diff line change
Expand Up @@ -45,7 +45,7 @@ _Min_Stack_Size = 0x800; /* required amount of stack */
MEMORY
{
ROM (xrw) : ORIGIN = 0x34000400, LENGTH = 511K
RAM (xrw) : ORIGIN = 0x34020000, LENGTH = 1536K
RAM (xrw) : ORIGIN = 0x34080000, LENGTH = 512K
}

/* Sections */
Expand Down