feat: add SystemVerilog/Verilog, Tcl, and VHDL language support - #1508

Analyzed 10 changed files (22 symbols). Blast radius: 36 files, 105 symbols.

25 affected test files to run:

• __tests__/exclude-config.test.ts
• __tests__/extension-mapping.test.ts
• __tests__/extraction.test.ts
• __tests__/frameworks.test.ts
• __tests__/grammar-wasm-bytes.test.ts
• __tests__/include-config.test.ts
• __tests__/kernel-ccpp-parity.test.ts
• __tests__/kernel-csharp-parity.test.ts
• __tests__/kernel-dart-parity.test.ts
• __tests__/kernel-grammar-parity.test.ts
• __tests__/kernel-kotlin-parity.test.ts
• __tests__/kernel-lua-parity.test.ts
• __tests__/kernel-php-parity.test.ts
• __tests__/kernel-r-parity.test.ts
• __tests__/kernel-ruby-parity.test.ts
• __tests__/kernel-rustlang-parity.test.ts
• __tests__/kernel-scaffold.test.ts
• __tests__/kernel-scala-parity.test.ts
• __tests__/kernel-swift-parity.test.ts
• __tests__/kernel-tsjs-parity.test.ts

Report: http://localhost:5173/impact/c9a4a369-167e-48e9-963e-79fa32399965