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Cortex-M: lower a max pool whose ceil_mode changes nothing - #22233

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Cortex-M: lower a max pool whose ceil_mode changes nothing#22233
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rascani:cortex-m-ceil-mode-maxpool

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@rascani rascani commented Aug 27, 2026

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Summary

The kernel floors, so CortexMMaxPool2DCheck refused every ceil_mode pool. Most do not need the ceiling: it adds a row or column only when the last window would hang off the end of the padded input, and all three of SqueezeNet's pools divide exactly. The checker and the lowering now compare the two sizes and accept when they agree, taking SqueezeNet from 29 lowered nodes to 32 with nothing but the concatenations and two layout no-ops left. Pools whose ceiling genuinely differs still decline.

The test is one-sided on purpose. Aten also drops a last window that starts beyond the input, which can bring the ceiling back down to the floor; those configurations keep falling back rather than earn a second rule.

Refusing was worse than staying in fp32. The checker annotates the node before tagging it, so the surrounding dq/q fold away and the fallback runs portable max_pool2d_with_indices over an int8 channels_last tensor -- whose index type is templated on the input dtype, so aten refuses a plane above 127 elements. Pools that lower no longer reach it.

Both gates now read the pool's arguments through one helper. The lowering used to index node.args by hand and compare the results against tuple literals, which a list never matches, so no pool that spells out its dilation could lower -- and naming ceil_mode is what puts dilation in the graph. Nor did it handle stride's schema default of [], meaning "same as the kernel".

Authored with Claude Code.

The kernel floors, so CortexMMaxPool2DCheck refused every ceil_mode pool. Most do
not need the ceiling: it adds a row or column only when the last window would
hang off the end of the padded input, and all three of SqueezeNet's pools divide
exactly. The checker and the lowering now compare the two sizes and accept when
they agree, taking SqueezeNet from 29 lowered nodes to 32 with nothing but the
concatenations and two layout no-ops left. Pools whose ceiling genuinely differs
still decline.

The test is one-sided on purpose. Aten also drops a last window that starts
beyond the input, which can bring the ceiling back down to the floor; those
configurations keep falling back rather than earn a second rule.

Refusing was worse than staying in fp32. The checker annotates the node before
tagging it, so the surrounding dq/q fold away and the fallback runs portable
max_pool2d_with_indices over an int8 channels_last tensor -- whose index type is
templated on the input dtype, so aten refuses a plane above 127 elements. Pools
that lower no longer reach it.

Both gates now read the pool's arguments through one helper. The lowering used to
index node.args by hand and compare the results against tuple literals, which a
list never matches, so no pool that spells out its dilation could lower -- and
naming ceil_mode is what puts dilation in the graph. Nor did it handle stride's
schema default of [], meaning "same as the kernel".

Authored with Claude Code.
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pytorch-bot Bot commented Aug 27, 2026

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🔗 Helpful Links

🧪 See artifacts and rendered test results at hud.pytorch.org/pr/pytorch/executorch/22233

Note: Links to docs will display an error until the docs builds have been completed.

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@meta-cla meta-cla Bot added the CLA Signed This label is managed by the Facebook bot. Authors need to sign the CLA before a PR can be reviewed. label Aug 27, 2026
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